The production of silicon integrated circuits has placed difficult demands on fabrication steps to increase the number of devices while decreasing the minimum feature sizes on a chip. These demands have extended to fabrication steps including depositing layers of different materials onto difficult topologies and etching further features within those layers. This is especially an issue in the manufacturing of next generation Negated AND or NOT AND (NAND) flash memory.
NAND is a type of non-volatile storage technology that does not require power to retain data. It is used primarily in main memory (of a computer for example), memory cards, universal serial bus (USB) flash drives, sold-state drives and such for general storage and transfer of data. To increase memory capacity within the same physical space, a three-dimensional NAND (3D NAND) design has been developed. Such a design introduces alternating oxide layers and nitride layers which are etched to produce a desired structure.
Etching a stack of alternating oxide layers and nitride layers effectively and efficiently with the appropriate critical dimensions and aspect ratios is a challenging task. Etching alternating oxide layers and nitride layers with high aspect ratios has presented difficult challenges, and is inefficient and costly using conventional gas mixtures.